The GATE 2024 Computer Science and Information Technology paper, Set 2: 65 questions for 100 marks in 180 minutes, with General Aptitude (15 marks) and the technical section (85 marks). Answers follow the official final answer key; every question has a short explanation.
Question 31
An instruction format has the following structure:
Instruction Number: Opcode destination reg, source reg-1, source reg-2
Consider the following sequence of instructions to be executed in a pipelined processor:
I1: DIV R3, R1, R2I2: SUB R5, R3, R4I3: ADD R3, R5, R6I4: MUL R7, R3, R8
Which of the following statements is/are TRUE?
Explanation
Answer: (A)
Take an earlier instruction and a later one. RAW (read after write) means the later one reads a register that the earlier one writes, WAR means the later one writes a register that the earlier one reads, and WAW means both write the same register. Here R3 is written by I1 and I3 and read by I2 and I4.
- A: I1 writes R3 and I2 reads it. RAW, so true.
- B: I1 and I3 both write R3, and I1 does not read it. That is WAW, not WAR.
- C: I2 reads R3 and the later I3 writes it. That is WAR, not RAW (the RAW between them is on R5).
- D: I3 writes R3 and I4 reads it. That is RAW, not WAW; I4 writes R7.
Answer: A