A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If the data is not found in L1 cache, it goes to L2 cache. If it fails to get the data from L2 cache, it goes to main memory, where the data is definitely available. Hit rates and access times of various memory units are shown in the figure. The average memory access time in nanoseconds (ns) is ________. (rounded off to two decimal places)
Answer
11.83 to 11.87
Explanation
The L2 and main-memory times already include the time lost on the earlier misses, so each path is simply weighted by its probability.
- L1 hit: probability \(0.95\), time 10 ns.
- L1 miss, L2 hit: probability \(0.05 \times 0.85 = 0.0425\), time 20 ns.
- Both miss: probability \(0.05 \times 0.15 = 0.0075\), time 200 ns.
\[T_{\text{avg}} = 0.95(10) + 0.0425(20) + 0.0075(200) = 9.5 + 0.85 + 1.5 = 11.85 \text{ ns}\]
Answer: 11.85