GATE CS 2006 — Question 41
A CPU has a five-stage pipeline and runs at 1 GHz frequency. Instruction fetch happens in the first stage of the pipeline. A conditional branch instruction computes the…
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Computer Organization and Architecture
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GATE CS 2004 — Question 67
Consider a small two-way set associative cache memory, consisting of four blocks. For choosing the block to be replaced, use the least recently used (LRU) scheme. The number…
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