A given program has 25% load/store instructions. Suppose the ideal CPI (cycles per instruction) without any memory stalls is 2. The program exhibits 2% miss rate on instruction cache and 8% miss rate on data cache. The miss penalty is 100 cycles. The speedup (rounded off to two decimal places) achieved with a perfect cache (i.e., with NO data or instruction cache misses) is _________
Answer
3
Explanation
Every instruction is fetched, so each one accesses the instruction cache once, while only the 25% load/store instructions also access the data cache. Memory stall cycles per instruction:
\[1 \times 0.02 \times 100 + 0.25 \times 0.08 \times 100 = 2 + 2 = 4\]
The real CPI is therefore \(2 + 4 = 6\), while a perfect cache gives the ideal CPI of 2. The instruction count and clock are the same in both cases, so the speedup is \(6 / 2 = 3.00\).
Applying the 8% data miss rate to every instruction gives a CPI of 12 and a speedup of 6, which overcounts the data accesses.
Answer: 3.00