GATE CS 2025 Set 1 | Question 27

MSQ · 1 mark

A partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?

Data path: Mux_A selects RA or a 32-bit immediate value, Mux_B selects RB or a 32-bit immediate value; both mux outputs feed the ALU, whose result goes to RZ
  1. Option A: The data path can implement arithmetic operations involving two registers. (correct)
  2. Option B: The data path can implement arithmetic operations involving one register and one immediate value. (correct)
  3. Option C: The data path can implement arithmetic operations involving two immediate values. (correct)
  4. Option D: The data path can only implement arithmetic operations involving one register and one immediate value.

Answer

(A), (B), (C)

Explanation

Each ALU input comes from its own multiplexer: Mux_A passes either RA or a 32-bit immediate value, and Mux_B passes either RB or a 32-bit immediate value. So every combination of the two operand sources is possible.

  • (A) True: select RA on Mux_A and RB on Mux_B.
  • (B) True: select RA and the immediate on Mux_B (or the immediate on Mux_A and RB).
  • (C) True: select the immediate input on both multiplexers.
  • (D) False: the word “only” is wrong, because (A) and (C) are also possible.

Answer: A, B, C