GATE CS Data Path Previous Year Questions

GATE CS 2025 Set 1 | Question 27

MSQ · 1 mark

A partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?

Data path: Mux_A selects RA or a 32-bit immediate value, Mux_B selects RB or a 32-bit immediate value; both mux outputs feed the ALU, whose result goes to RZ

The data path can implement arithmetic operations involving two registers. The data path can implement arithmetic operations involving one register and one immediate value. The data path can implement arithmetic operations involving two immediate values. The data path can only implement arithmetic operations involving one register and one immediate value.

Explanation

Answer: (A), (B), (C)

Each ALU input comes from its own multiplexer: Mux_A passes either RA or a 32-bit immediate value, and Mux_B passes either RB or a 32-bit immediate value. So every combination of the two operand sources is possible.

(A) True: select RA on Mux_A and RB on Mux_B.
(B) True: select RA and the immediate on Mux_B (or the immediate on Mux_A and RB).
(C) True: select the immediate input on both multiplexers.
(D) False: the word “only” is wrong, because (A) and (C) are also possible.

Answer: A, B, C

GATE CS 2025 Set 2 | Question 61

NAT · 2 marks

An application executes \(6.4 \times 10^{8}\) number of instructions in 6.3 seconds. There are four types of instructions, the details of which are given in the table. The duration of a clock cycle in nanoseconds is _________. (rounded off to one decimal place)

Instruction type	Clock cycles required per instruction (CPI)	Number of instructions executed
Branch	2	\(2.25 \times 10^{8}\)
Load	5	\(1.20 \times 10^{8}\)
Store	4	\(1.65 \times 10^{8}\)
Arithmetic	3	\(1.30 \times 10^{8}\)

Your answer

Explanation

Answer: 3

The total number of clock cycles is the CPI-weighted sum of the instruction counts:

\[(2 \times 2.25 + 5 \times 1.20 + 4 \times 1.65 + 3 \times 1.30) \times 10^{8} = (4.5 + 6.0 + 6.6 + 3.9) \times 10^{8} = 21 \times 10^{8}\]

The four counts add up to \(6.4 \times 10^{8}\), as stated, so the average CPI is \(21 / 6.4 \approx 3.28\).

Dividing the run time by the cycle count gives the clock cycle time:

\[\frac{6.3\ \text{s}}{21 \times 10^{8}} = 3 \times 10^{-9}\ \text{s} = 3.0\ \text{ns}\]

Answer: 3.0

GATE CS 2024 Set 1 | Question 55

NAT · 2 marks

The baseline execution time of a program on a 2 GHz single core machine is 100 nanoseconds (ns). The code corresponding to 90% of the execution time can be fully parallelized. The overhead for using an additional core is 10 ns when running on a multicore system. Assume that all cores in the multicore system run their share of the parallelized code for an equal amount of time.

The number of cores that minimize the execution time of the program is ________

Your answer

Explanation

Answer: 3

Of the 100 ns, 10 ns is serial and 90 ns can be shared. With \(p\) cores the shared part takes \(90/p\) ns, and each of the \(p - 1\) additional cores costs 10 ns:

\[T(p) = 10 + \frac{90}{p} + 10(p - 1)\]

This gives \(T(1) = 100\), \(T(2) = 65\), \(T(3) = 60\), \(T(4) = 62.5\) and \(T(5) = 68\) ns. A fourth core saves only \(30 - 22.5 = 7.5\) ns on the parallel part but adds 10 ns of overhead, so the time is smallest with 3 cores.

Charging the overhead for every core (\(10p\)) raises each time by 10 ns and still gives 3. The 2 GHz clock rate plays no part.

Answer: 3