GATE CS 2025 Set 2 | Question 28

MSQ · 1 mark

Which of the following is/are part of an Instruction Set Architecture of a processor?

  1. Option A: The size of the cache memory
  2. Option B: The clock frequency of the processor
  3. Option C: The number of cache memory levels
  4. Option D: The total number of registers (correct)

Answer

(D)

Explanation

The ISA is the contract between hardware and software: what a compiler or assembly programmer must know to write correct machine code. It covers the instructions and their encodings, the addressing modes, the data types and the programmer-visible registers. Instructions name registers by number, so the number of registers is fixed by the ISA (D).

Cache size, the number of cache levels and the clock frequency are implementation (microarchitecture) choices. Processors with the same ISA differ in all three yet run the same programs unchanged, only at different speeds. So (A), (B) and (C) are not part of the ISA.

Answer: D