GATE CS 2024 Set 1 | Question 30

MSQ · 1 mark

Consider a 5-stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the following statements about forwarding is/are CORRECT?

  1. Option A: In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction (correct)
  2. Option B: In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction (correct)
  3. Option C: Forwarding cannot prevent all pipeline stalls (correct)
  4. Option D: Forwarding does not require any extra hardware to retrieve the data from the pipeline stages

Answer

(A), (B), (C)

Explanation

  • A: true. This is what forwarding (bypassing) means: a result goes straight from the stage that produces it in an earlier instruction to the stage that needs it in a later one, without waiting for the register write in WB.
  • B: true. The MEM/WB pipeline register holds what leaves the MEM stage, such as a loaded word, and a forwarding path takes it to the ALU inputs in EX. A loaded value reaches the very next instruction this way after one stall cycle.
  • C: true. That stall is unavoidable: a loaded value appears only at the end of MEM, while the next instruction needs it at the start of EX in the same cycle.
  • D: false. Forwarding needs extra paths, multiplexers at the ALU inputs and a forwarding unit that compares register numbers.

Answer: A, B, C