GATE CS 2024 Set 2 | Question 57

NAT · 2 marks

A processor with 16 general purpose registers uses a 32-bit instruction format. The instruction format consists of an opcode field, an addressing mode field, two register operand fields, and a 16-bit scalar field. If 8 addressing modes are to be supported, the maximum number of unique opcodes possible for every addressing mode is _________

Answer

32

Explanation

Add up the fixed fields of the 32-bit instruction:

  • each register field names one of 16 registers, so it needs \(\log_2 16 = 4\) bits, and the two fields take 8 bits;
  • 8 addressing modes need \(\log_2 8 = 3\) bits;
  • the scalar field takes 16 bits.

That leaves \(32 - 8 - 3 - 16 = 5\) bits for the opcode, so at most \(2^{5} = 32\) opcodes can be encoded. The mode has its own field, so all 32 opcodes can be combined with each of the 8 addressing modes.

Answer: 32